Propagation of best practice for multicore interference analysis between aerospace and automotive domains
Dr. Sam Thompson
Multicore Engineering Team Lead, Rapita Systems
For high-integrity systems utilising multicore processors, multicore interference is a well-known and challenging problem: competition for shared processor resources can allow notionally independent software executing on different cores to have a very large impact on the execution time behaviour of each other. Partitioning mechanisms can be deployed to mitigate this interference. Some of these may be implemented by configuring the hardware in a certain way, others rely upon operating system or hypervisor mechanisms, and yet others may rely upon the architecture of the operational software itself.
Whenever a partitioning mechanism is used for the mitigation of an interference channel, it is necessary to demonstrate that the mechanism is effective; if the mechanism cannot be demonstrated to be effective, then the interference channel cannot be assumed to be mitigated. We demonstrate how a combination of timing measurements, resource usage measurements, and carefully-crafted interference-generation code can be used to provide robust on-target evidence that an interference channel has been effectively mitigated by a partitioning mechanism.
About Dr. Sam Thompson
Dr Samuel Thompson is a Senior Multicore Analysis Engineer in the multicore team at Rapita Systems Limited, and has a significant role in both the development of Rapita’s multicore solution as well as the delivery of customer projects on multicore platforms. Sam’s professional background includes work on safety-critical automation projects, systems design, and the analysis of large disparate datasets. He received his PhD from the University of York for the analysis of sub-diffraction-limit light-scattering and dynamic interaction data from engineered nanoparticles.
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